A high-resolution time-to-digital converter implemented in field-programmable-gate-arrays

Author

Song, Jian ; An, Qi ; Liu, Shubin

Author_Institution

Dept. of Modern Phys., China Univ. of Sci. & Technol., Hefei

Volume

53

Issue

1

fYear

2006

Firstpage

236

Lastpage

241

Abstract

A high-resolution time-to-digital converter (TDC) implemented in a general purpose field-programmable-gate-array (FPGA) is presented. Dedicated carry lines of an FPGA are used as delay cells to perform time interpolation within the system clock period and to realize the fine time measurement. Two Gray-code counters, working on in-phase and out-of-phase system clocks respectively, are designed to get the stable value of the coarse time measurement. The fine time code and the coarse time counter value, along with the channel identifier, are then written into a first-in first-out (FIFO) buffer. Tests have been done to verify the performance of the TDC. The resolution after calibration can reach 50 ps

Keywords

field programmable gate arrays; nuclear electronics; Gray-code counters; field programmable gate arrays; first-in first-out buffer; time-to-digital converter; Application specific integrated circuits; Clocks; Counting circuits; Delay effects; Delay lines; Field programmable gate arrays; Interpolation; Physics; Testing; Time measurement; Field programmable gate arrays (FPGAs); code density test; time measurement; time-to-digital converter (TDC);

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2006.869820

Filename

1610982