DocumentCode :
885905
Title :
Dynamic depletion mode: an E/D MOSFET circuit method for improved performance
Author :
Knepper, Ronald W.
Volume :
13
Issue :
5
fYear :
1978
fDate :
10/1/1978 12:00:00 AM
Firstpage :
542
Lastpage :
548
Abstract :
A new method of designing enhancement/depletion (E/D) MOSFET circuits, involving the dynamic or pulsed use of depletion-mode devices, is described. The method can result in improvements in performance and/or power in the design of memory, logic, and driver circuits. The method is compared with the standard approach to the design of E/D circuits. Several circuits designed by the method have been simulated by use of a numerical circuit analysis program and have been placed on an experimental test chip. Theoretical and experimental results are presented.
Keywords :
Digital integrated circuits; Field effect integrated circuits; Integrated circuit technology; digital integrated circuits; field effect integrated circuits; integrated circuit technology; Analytical models; Circuit simulation; Circuit testing; Design methodology; Driver circuits; Logic circuits; Logic design; Logic devices; MOSFET circuits; Pulse circuits;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1978.1051097
Filename :
1051097
Link To Document :
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