DocumentCode
886023
Title
A 15-ns 1024-bit fully static MOS RAM
Author
Wada, Toshio ; Kudoh, Osamu ; Nagahashi, Yasuhiko ; Matsue, Shigeki
Volume
13
Issue
5
fYear
1978
Firstpage
635
Lastpage
639
Abstract
A fully static 1K bit, TTL compatible, 5-V only MOS RAM has been achieved by using improved process technology and optimized circuit design. Address access time is less than 15 ns and power dissipation is less than 320 mW at room temperature.
Keywords
Field effect integrated circuits; Integrated circuit technology; Integrated memory circuits; Large scale integration; Random-access storage; Transistor-transistor logic; field effect integrated circuits; integrated circuit technology; integrated memory circuits; large scale integration; random-access storage; transistor-transistor logic; Circuit synthesis; Conductivity; Design optimization; Doping; MOSFETs; Parasitic capacitance; Random access memory; Read-write memory; Threshold voltage; Transconductance;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1978.1051111
Filename
1051111
Link To Document