• DocumentCode
    886084
  • Title

    Modeling, optimization and control of spatial uniformity in manufacturing processes

  • Author

    Guo, Ruey-Shan ; Sachs, Emanuel

  • Author_Institution
    Nat. Semicond. Corp., Santa Clara, CA, USA
  • Volume
    6
  • Issue
    1
  • fYear
    1993
  • fDate
    2/1/1993 12:00:00 AM
  • Firstpage
    41
  • Lastpage
    57
  • Abstract
    Spatial uniformity, or the uniformity of product output characteristics at different locations in a batch of product is modeled, optimized, and controlled using a methodology called multiple response surfaces, which may be used to characterize the results of an experimental design. Multiple, low-order polynomial models are used to model the output characteristics at each of several sites within a batch of product. The uniformity model is then obtained by manipulating these multiple models. The approach is compared to the traditional method of fitting a single high-order polynomial to the calculated uniformity. Experimental results confirm that similar or improved modeling accuracy is obtained with fewer data points using the new method due to the use of low-order models. Characteristics of the approach are examined both analytically and in application to plasma etching, silicon epitaxy, tungsten chemical vapor deposition (CVD) and the simulation of polysilicon low-pressure CVD (LPCVD)
  • Keywords
    chemical vapour deposition; process control; semiconductor epitaxial layers; semiconductor growth; semiconductor technology; sputter etching; vapour phase epitaxial growth; CVD; LPCVD; Si epitaxy; chemical vapor deposition; epitaxial growth; experimental design; experimental results; fewer data points; low-order polynomial models; low-pressure CVD; manufacturing processes; modeling accuracy; multiple response surfaces; optimization; plasma etching; product output characteristics; spatial uniformity; uniformity model; Chemical analysis; Design for experiments; Design optimization; Plasma applications; Plasma chemistry; Plasma properties; Plasma simulation; Polynomials; Response surface methodology; Semiconductor process modeling;
  • fLanguage
    English
  • Journal_Title
    Semiconductor Manufacturing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0894-6507
  • Type

    jour

  • DOI
    10.1109/66.210657
  • Filename
    210657