DocumentCode :
886152
Title :
QR-decomposition decision feedback equalisation and finite-precision results
Author :
Sesay, A.B. ; Patton, M.
Author_Institution :
Calgary Univ., Alta., Canada
Volume :
140
Issue :
2
fYear :
1993
fDate :
4/1/1993 12:00:00 AM
Firstpage :
89
Lastpage :
97
Abstract :
The QRD LS algorithm is generally recognised for its superior numerical properties under finite-precision implementation. Furthermore, its systolic architecture is well suited for VLSI implementation. In DFE applications the inherent and implementation nonlinearities make it impossible to analyse precisely all effects of finite-precision arithmetic. The paper presents finite precision results of a QRD LS DFE using the TMS320C25 16-bit precision DSP processors as a simulation platform. Using the bit error rate as a performance measure, results are presented for 2-PSK, 4-PSK and Pi/4-DQPSK modulation formats. Also presented are the numerical accuracy and convergence sensitivity for the filter weights. These results may serve as a basis for practical implementation of QRD LS DFEs
Keywords :
VLSI; digital arithmetic; digital filters; digital signal processing chips; equalisers; feedback; least squares approximations; phase shift keying; systolic arrays; 16 bit; 2-PSK; 4-PSK; DFE; DSP processors; Pi/4-DQPSK modulation; QR decomposition; QRD LS algorithm; TMS320C25; VLSI; bit error rate; convergence sensitivity; decision feedback equalisation; filter weights; finite-precision arithmetic; numerical accuracy; performance measure; simulation platform; systolic architecture;
fLanguage :
English
Journal_Title :
Radar and Signal Processing, IEE Proceedings F
Publisher :
iet
ISSN :
0956-375X
Type :
jour
Filename :
210669
Link To Document :
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