• DocumentCode
    886319
  • Title

    A single-chip I/sup 2/L PCM codec

  • Author

    Blauschild, Robert A. ; Tucci, Patrick A. ; Russell, Howard T., Jr. ; Purinton, Daniel M. ; Murthi, Enjeti N.

  • Volume
    14
  • Issue
    1
  • fYear
    1979
  • Firstpage
    59
  • Lastpage
    64
  • Abstract
    A single chip CPCM codec is described. This chip, which is fabricated in bipolar technology, meets all the D3 specifications. The circuit is capable of operating in a fully asynchronous transmit and receive mode, and provisions are made for zero code suppression and A/B signaling. Even with this signaling, the codec achieves a worst case idle channel noise of 13 dBrnC0.
  • Keywords
    Bipolar integrated circuits; Encoding; Integrated logic circuits; Pulse-code modulation; bipolar integrated circuits; encoding; integrated logic circuits; pulse-code modulation; Circuit noise; Clocks; Codecs; Decoding; Encoding; Logic design; Phase change materials; Production; Registers; Switches;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.1979.1051142
  • Filename
    1051142
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=886319