DocumentCode :
886445
Title :
A dual-mode sensing scheme of capacitor-coupled EEPROM cell
Author :
Hayashikoshi, Masanori ; Hidaka, Hideto ; Arimoto, Kazutami ; Fujishima, Kazuyasu
Author_Institution :
Mitsubishi Electr. Corp., Hyogo, Japan
Volume :
27
Issue :
4
fYear :
1992
fDate :
4/1/1992 12:00:00 AM
Firstpage :
569
Lastpage :
573
Abstract :
A dual-mode sensing (DMS) scheme for a capacitor-coupled EEPROM cell is described. A memory cell structure and a sensing scheme are proposed and estimated. The memory cell combines an EEPROM cell with a DRAM cell. The DMS scheme utilizes the charge-mode sensing of the EEPROM cell. Using this DMS technique, the sensing speed can be enhanced by 36% at a cell current of 15 μA by virtue of the additional charge-mode sensing. Furthermore, the stress applied to the tunnel oxide of the memory transistor can be relieved by decreasing the programming voltage and shortening the programming time. Therefore, with this memory cell structure and sensing scheme, it is possible to realize high-speed sensing in low-voltage operation and high endurance
Keywords :
EPROM; MOS integrated circuits; integrated memory circuits; 15 muA; DRAM cell; EEPROM cell; capacitor-coupled EEPROM cell; cell current; charge-mode sensing; dual-mode sensing scheme; high endurance; high-speed sensing; low-voltage operation; memory cell structure; sensing speed; tunnel oxide; Capacitors; Computer architecture; Degradation; EPROM; Handheld computers; Large scale integration; Low voltage; Memory architecture; Random access memory; Stress;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.126545
Filename :
126545
Link To Document :
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