Static and dynamic noise margins of logic circuits

Explaining four basic types of noise, and by showing the various methods, together with boundary conditions, which can be used to find the worst case noise margins. A flip-flop setup is advised which can be used for measurements and computer simulations, both for static and dynamic noise margins. Also configurations with fan-in and fan-out larger than 1 can be handled with this flip-flop method. In general, it is found that the dynamic noise margins increase for shorter noise pulses; a first-order explanation of this phenomenon is given. Also, energy noise margins are considered. The theoretical considerations are completed with computer simulations and measurements of the static and dynamic noise margins of integrated Schottky logic (ISL), as an example.