DocumentCode
887639
Title
An Improved Time Delay Simulation
Author
Budak, Aram
Author_Institution
Department of Electrical Engineering, Colorado State University, Fort Collins, Colo.
Issue
1
fYear
1966
Firstpage
122
Lastpage
122
Keywords
Analog computers; Circuit synthesis; Computational modeling; Computer simulation; Delay effects; H infinity control; Linearity; Network synthesis; Poles and zeros; Polynomials;
fLanguage
English
Journal_Title
Electronic Computers, IEEE Transactions on
Publisher
ieee
ISSN
0367-7508
Type
jour
DOI
10.1109/PGEC.1966.264415
Filename
4038684
Link To Document