• DocumentCode
    887697
  • Title

    A masterslice LSI for subnanosecond random logic

  • Author

    Braeckelmann, Walter ; Wilhelm, Wilhelm ; Graul, JÜrgen ; Kaiser, Hans

  • Volume
    14
  • Issue
    5
  • fYear
    1979
  • Firstpage
    829
  • Lastpage
    832
  • Abstract
    Describes the design and implementation of a bipolar subnanosecond gate arrays with a complexity up to 700 gates. There are three different basic arrays with either 24 or 36 cells or 24 cells plus a 128 bit RAM. Each cell has the logic power of a small MSI. The masterslice is ECL compatible.
  • Keywords
    Bipolar integrated circuits; Emitter-coupled logic; Integrated logic circuits; Large scale integration; bipolar integrated circuits; emitter-coupled logic; integrated logic circuits; large scale integration; Boron; Data processing; Delay; Integrated circuit interconnections; Isolation technology; Large scale integration; Logic circuits; Logic design; Resistors; Switches;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.1979.1051279
  • Filename
    1051279