DocumentCode
887707
Title
The per-unit-length capacitance matrix of flaring VLSI packaging interconnections
Author
Omer, Ahmed A. ; Cangellaris, Andreas C. ; Mechaik, Mehdi M. ; Prince, John L.
Author_Institution
Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
Volume
14
Issue
4
fYear
1991
fDate
12/1/1991 12:00:00 AM
Firstpage
749
Lastpage
754
Abstract
A three-dimensional capacitance calculator was used for the accurate calculation of the per-unit-length (PUL) capacitance matrix of flaring, multiple, coupled microstrip, and stripline interconnections. Properly constructed Green´s functions that satisfy the boundary conditions at dielectric interfaces were implemented in order to minimize the number of unknowns involved in the numerical solution. Under the assumption that the longitudinal components of the electric and magnetic fields are negligible compared to the transverse ones, the PUL inductance matrix was found from the inverse of the capacitance matrix calculated from the same conductor geometry in a uniform dielectric medium
Keywords
Green´s function methods; VLSI; boundary-value problems; capacitance; inductance; integral equations; numerical methods; packaging; strip lines; transmission line theory; Green´s functions; dielectric interface boundary conditions; flaring VLSI packaging interconnections; inductance matrix; integral equation; microstrip interconnections; numerical solution; per-unit-length capacitance matrix; stripline interconnections; three-dimensional capacitance calculator; uniform dielectric medium; Boundary conditions; Capacitance; Dielectrics; Green´s function methods; Magnetic fields; Microstrip; Packaging; Stripline; Transmission line matrix methods; Very large scale integration;
fLanguage
English
Journal_Title
Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
Publisher
ieee
ISSN
0148-6411
Type
jour
DOI
10.1109/33.105128
Filename
105128
Link To Document