DocumentCode
887742
Title
An ECL 100K-compatible 1024x4 bit RAM with 15 ns access time
Author
Glock, Hans ; Bürker, Ulf
Volume
14
Issue
5
fYear
1979
Firstpage
850
Lastpage
854
Abstract
An ECL 100K-compatible 1024/spl times/4 bit RAM with 15 ns access time, 900 mW power dissipation, and a chip size of 18.3 mm/SUP 2/ has been developed for caches and control memories of high-performance computer systems. The 1K/spl times/4 organisation mode combines the lower cost per bit of a 4K-bit device with the higher memory-module design flexibility of a 1K word unit. The excellent speed performance together with the high packing density have been achieved by using an oxide isolation technology with oxide-walled emitters in conjunction with novel circuit techniques.
Keywords
Bipolar integrated circuits; Emitter-coupled logic; Integrated circuit technology; Integrated memory circuits; Large scale integration; Random-access storage; bipolar integrated circuits; emitter-coupled logic; integrated circuit technology; integrated memory circuits; large scale integration; random-access storage; Bridge circuits; Clamps; Control systems; Costs; Driver circuits; Logic arrays; Logic circuits; Random access memory; Read-write memory;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1979.1051283
Filename
1051283
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