DocumentCode
887769
Title
CMOS/SOS EAROM memory arrays
Author
Stewart, Roger G.
Volume
14
Issue
5
fYear
1979
fDate
10/1/1979 12:00:00 AM
Firstpage
860
Lastpage
864
Abstract
A new low-voltage nonvolatile memory cell has been fabricated using standard CMOS/SOS processing. The cell can be programmed at 10 V, conducts 400 μA when programmed, and can be erased either electrically or with UV light. Using this cell, a family of memories have been built which dissipate only 50 μW at 5 V, retain data for 17.3 years at 125°C, and have a WRITE/ERASE endurance in excess of 300 cycles.
Keywords
Field effect integrated circuits; Integrated circuit technology; Large scale integration; Read-only storage; field effect integrated circuits; integrated circuit technology; large scale integration; read-only storage; CMOS process; CMOS technology; Detectors; EPROM; Helium; Large scale integration; Nonvolatile memory; Propagation delay; Pulse circuits; Secondary generated hot electron injection;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1979.1051285
Filename
1051285
Link To Document