DocumentCode
887868
Title
An inherently monotonic 12 bit DAC
Author
Schoeff, John A.
Volume
14
Issue
6
fYear
1979
Firstpage
904
Lastpage
911
Abstract
Describes a 12 bit DAC which uses diffused resistors and requires no trimming to guarantee monotonicity for all grades over the temperature range. The segmented ladder design, departing from the traditional R-2R approach used in virtually all high-speed high resolution converters, provides inherent monotonicity and differential linearity as high as 13 bits. Also afforded is a more uniform step size over the temperature range than the trimmed 12 bit converters. The only critical resistor matching occurs at the major carries or midpoints of each of the eight segments and the tolerances are equivalent to that of a 9 bit DAC, or eight times lower than the R-2H approach. In essence, the problem has been divided into eight separate problems, each with tolerances eight times lower than that of a 12 bit DAC. The converter has been found to be immune to variations in temperature, time, process, and mechanical stress. The circuit also features differential high compliance current outputs, wide supply range, and a multiplying input.
Keywords
Bipolar integrated circuits; Digital-analogue conversion; bipolar integrated circuits; digital-analogue conversion; Assembly; Costs; Dielectric thin films; Error correction; Isolation technology; Resistors; Software maintenance; Stability; Temperature distribution; Test equipment;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1979.1051296
Filename
1051296
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