DocumentCode :
887937
Title :
A high-speed 7 bit A/D converter
Author :
Van De Plassche, Rudy J. ; Van Der Grift, Rob E J
Volume :
14
Issue :
6
fYear :
1979
Firstpage :
938
Lastpage :
943
Abstract :
A 7 bit two-step parallel A/D converter has been designed using a new quantizer-subtractor circuit. The small delay in the new circuit allows digital signal sampling by latching comparators. A sample and hold unit is not needed which results in a fully integrable A/D function. Analog input signals up to 5 MHz can be digitally sampled with sampling frequencies up to 50 MHz. A double layer metallization process is used to reduce the die size to 2.4/spl times/2.5 mm.
Keywords :
Analogue-digital conversion; Bipolar integrated circuits; Comparators (circuits); analogue-digital conversion; bipolar integrated circuits; comparators (circuits); Circuits; Complexity theory; Cost function; Delay; Density estimation robust algorithm; Diodes; Frequency; Large scale integration; Resistors; Signal sampling;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1979.1051301
Filename :
1051301
Link To Document :
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