DocumentCode
888007
Title
Sprint - The Systolic Processor with a Reconfigurable Interconnection Network of Transputers
Author
De Groot, A.J. ; Johansson, E.M. ; Fitch, J.P. ; Grant, C.W. ; Parker, S.R.
Author_Institution
Engineering Research Division Lawrence Livermore National Laboratory PO Box 808 L-156 Livermore, Calif. 94550
Volume
34
Issue
4
fYear
1987
Firstpage
873
Lastpage
877
Abstract
The Systolic Processor with a Reconfigurable Interconnection Network of Transputers (SPRINT) is a sixty-four-processor multiprocessor developed at Lawrence Livermore National Laboratory for experimentally evaluating systolic algorithms and architectures. This paper describes the architecture of the SPRINT and several algorithms which have been executed on it.
Keywords
Binary trees; Computer architecture; Concurrent computing; Hypercubes; Laboratories; Microprocessors; Multiprocessor interconnection networks; Parallel processing; Switches; Systolic arrays;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.1987.4334755
Filename
4334755
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