DocumentCode
888267
Title
The Development of a Bubble Memory Controller for Low-Cost FiIe Use
Author
Kita, Yuzo ; Yamaguch, Noboru ; Sugie, Mamoru ; Yoshizawa, Shigeru
Volume
15
Issue
1
fYear
1980
fDate
2/1/1980 12:00:00 AM
Firstpage
25
Lastpage
32
Abstract
The bubble memory has several features such as low-cost low-power consumption, small physical size, high reliability, and non-volatility, which make it suitable for low-cost microcomputer files. The microcomputer interface and bubble control logics are integrated into a single chip which we call the bubble memory controller (BMC), making it possible to install a complete 1 Mbit bubble memory system on a 15 cm X 18 cm board. This paper describes in detail the BMC development and considers important matters in the design of large-scale logic LSI´s which are represented by the microprocessors.
Keywords
Magnetic bubble devices; Microprocessor chips; Circuits; Control systems; Costs; Hardware; Large scale integration; Large-scale systems; Logic design; Logic devices; Microcomputers; Transfer functions;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1980.1051334
Filename
1051334
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