DocumentCode
888608
Title
Stacked I/sup 2/L structures
Author
Petrie, W.F. ; Elmasry, Mohamed I.
Volume
15
Issue
2
fYear
1980
fDate
4/1/1980 12:00:00 AM
Firstpage
240
Lastpage
244
Abstract
In LSI environments where the available power supply is greater than 800 mV, integrated injection-logic´s (I/SUP 2/L´s) inherent high level of power efficiency is restored by stacking. The use of stacked I/SUP 2/L structures in the realization of random logic and regular arrays is studied. Two approaches are considered and compared. Design examples are given including adders, a seven segment display decoder, and a control logic function. The degradation of the speed of operation because of the stacking is analyzed and experimentally verified.
Keywords
Adders; Integrated logic circuits; Large scale integration; adders; integrated logic circuits; large scale integration; Bipolar transistors; Large scale integration; Linear circuits; Logic arrays; Logic design; Logic gates; Photonic band gap; Power supplies; Silicon; Stacking;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1980.1051369
Filename
1051369
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