Heavy ion induced single hard errors on submicronic memories [for space application]

Author

Dufour, C. ; Garnier, P. ; Carrière, T. ; Beaucour, J. ; Ecoffet, R. ; Labrunée, M.

Author_Institution

Matra Marconi Space, Velizy Villacoublay, France

Volume

39

Issue

6

fYear

1992

fDate

12/1/1992 12:00:00 AM

Firstpage

1693

Lastpage

1697

Abstract

Recent heavy ion testing of high density SRAMs (static random access memories) has revealed radiation-induced hard errors: the errors show up as jammed bits in the memory. This phenomenon appears for high LET (linear transform energy) values. The single hard errors (SHEs) uniformly spread on the memory plane, disappear through UV escape, and anneal very slowly. It is believed that the errors are due to local ionizing dose deposition. This phenomenon could become an important limitation to space electronics design with the growing integration of the devices. The authors describe the test setup, the hard error characterization, and some first theoretical considerations for explaining this phenomenon

Keywords

SRAM chips; aerospace instrumentation; integrated circuit testing; ion beam effects; radiation hardening (electronics); heavy ion induced errors; high LET; high density SRAM; jammed bits; local ionizing dose deposition; radiation-induced hard errors; space application; space electronics design; submicronic memories; test setup; Annealing; Circuits; Extraterrestrial phenomena; Jamming; Latches; Microelectronics; Performance evaluation; Power supplies; Random access memory; System testing;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/23.211355

Filename

211355