DocumentCode
888701
Title
Random Telegraph Signal in Flash Memory: Its Impact on Scaling of Multilevel Flash Memory Beyond the 90-nm Node
Author
Kurata, Hideaki ; Otsuga, Kazuo ; Kotabe, Akira ; Kajiyama, Shinya ; Osabe, Taro ; Sasago, Yoshitaka ; Narumi, Shunichi ; Tokami, Kenji ; Kamohara, Shiro ; Tsuchiya, Osamu
Author_Institution
Hitachi, Ltd., Tokyo
Volume
42
Issue
6
fYear
2007
fDate
6/1/2007 12:00:00 AM
Firstpage
1362
Lastpage
1369
Abstract
Threshold-voltage (Vth) fluctuation due to random telegraph signal (RTS) in flash memory was observed for the first time. A large amount of data of Vth fluctuation was acquired by using a 90-nm-node memory array, and it was confirmed that a few memory cells have large RTS fluctuation exceeding 0.2 V. It was found that program-and-erase cycles increase Vth amplitude in a flash memory. It was also found by simulation and measurement that tail-bits are generated due to RTS in multilevel flash operation. The amount of Vth broadening due to the tail-bits was estimated to become larger as the scaling of memory cells advances and reaches more than 0.3 V in the 45-nm node. These results thus demonstrate that RTS will become a prominent issue in designing multilevel flash memory in the 45-nm node and beyond.
Keywords
flash memories; fluctuations; flash memory array; multilevel scaling; program-and-erase cycles; random telegraph signal; size 45 nm; size 90 nm; threshold-voltage fluctuation; CMOS technology; Cellular phones; Costs; Digital cameras; Electron traps; Flash memory; Fluctuations; Moore´s Law; Telegraphy; Voltage control; Flash memories; Monte Carlo simulation; multilevel cell; random telegraph signals; scaling;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2007.897158
Filename
4214972
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