DocumentCode
888779
Title
Post-linearization of cascode CMOS low noise amplifier using folded PMOS IMD sinker
Author
Tae-Sung Kim ; Byung-Sung Kim
Author_Institution
Sch. of Inf. & Commun., Sungkyunkwan Univ., Suwon, South Korea
Volume
16
Issue
4
fYear
2006
fDate
4/1/2006 12:00:00 AM
Firstpage
182
Lastpage
184
Abstract
A post-linearization technique for the cascode complementary metal oxide semiconductor (CMOS) low noise amplifier (LNA) is presented. The proposed method uses an additional folded cascode positive-channel metal oxide semiconductor field-effect transistor for sinking the third-order intermodulation distortion (IMD3) current generated by the common source stage, while minimizing the degradation of gain and noise figure. This technique is applied to enhance the linearity of CMOS LNA using 0.18-μm technology. The LNA achieved +13.3-dBm IIP3 with 12.8-dB gain, 1.4dB NF at 2GHz consuming 8mA from a 1.8-V supply.
Keywords
CMOS analogue integrated circuits; UHF amplifiers; UHF integrated circuits; intermodulation distortion; linearisation techniques; low noise amplifiers; 0.18 micron; 1.4 dB; 1.8 V; 12.8 dB; 2 GHz; 8 mA; CMOS LNA; CMOS low noise amplifier; cascode PMOS IMD sinker; common source stage; complementary metal oxide semiconductor; positive-channel metal oxide semiconductor field-effect transistor; post-linearization technique; third-order intermodulation distortion; CMOS technology; Degradation; FETs; Intermodulation distortion; Linearity; Low-noise amplifiers; Noise figure; Noise measurement; Semiconductor device noise; Semiconductor optical amplifiers; Cascode; complementary metal oxide semiconductor (CMOS); intermodulation distortion (IMD); linearization; low noise amplifier (LNA);
fLanguage
English
Journal_Title
Microwave and Wireless Components Letters, IEEE
Publisher
ieee
ISSN
1531-1309
Type
jour
DOI
10.1109/LMWC.2006.872131
Filename
1613889
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