Title :
2K x 8 Bit Hi-CMOS Static RAM´s
Author :
Minato, Osamu ; Masuhara, Toshiaki ; Sasaki, Toshio ; Nakamura, Hideaki ; Sakai, Yoshio ; Yasui, Tokumasa ; Uchibori, Kiyofumi
Abstract :
Two Hi-CMOS static RAM´s with 2K word by 8 bit organization have been developed. These RAM´s are fabricated with single polysilicon technology, which reduces processing costs. A novel J-FET powered static cell formed in the p well is used. The cell area is reduced to 80 percent that of the standard cell. Hi-CMOS well structure gives good immunity to alpha-particle-induced soft errors. These new RAM´s have an address access time of 74 ns, an operating power dissipation of 200 mW,and a standby dissipation of 25 /spl mu/W.
Keywords :
Elemental semiconductors; Field effect integrated circuits; Integrated memory circuits; Junction gate field effect transistors; Random-access storage; Silicon; CMOS technology; Circuits; Computer errors; Costs; Flip-flops; MOS devices; Microcomputers; Power dissipation; Random access memory; Read-write memory;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1980.1051451
