DocumentCode :
890015
Title :
A fast, latching comparator for 12 bit A/D applications
Author :
Erdi, George
Volume :
15
Issue :
6
fYear :
1980
Firstpage :
949
Lastpage :
954
Abstract :
High-speed, 12 bit accurate successive approximation A/D converters demand a comparator with both excellent input specifications and fast response time. The author describes a voltage comparator with 50 ns response time to 1/2 LSB overdrive (1.2 mV) and 0.1 LSB (250 /spl mu/V) total input error. Unique features of the circuit include a super-/spl beta/ input stage, a fast buried-zener level-shift, a fully differential output stage, a floating-zener biasing scheme, and a fast latch circuit which does not interfere with input accuracy. The comparator is manufactured on a bipolar, double-implanted, thin epi, junction-isolated process.
Keywords :
Analogue-digital conversion; Bipolar integrated circuits; Comparators (circuits); analogue-digital conversion; bipolar integrated circuits; comparators (circuits); Active noise reduction; Analog integrated circuits; Broadband amplifiers; Delay; Electrons; Integrated circuit noise; Integrated circuit technology; Operational amplifiers; Space technology; Voltage;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1980.1051502
Filename :
1051502
Link To Document :
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