DocumentCode
890898
Title
A single-chip CMOS PCM codec with filters
Author
Marsh, Douglas G. ; Ahuja, Bhupendra K. ; Misawa, Toshio ; Dwarakanath, Mirmira R. ; Fleischer, Paul E. ; Saari, Veikko R.
Volume
16
Issue
4
fYear
1981
Firstpage
308
Lastpage
315
Abstract
A complete PCM codec using charge redistribution and switched-capacitor techniques will be described. The device is implemented in a two-level polysilicon CMOS technology using 23.4 mm/SUP 2/ of active area. It features all the required transmission filters needed for telephony, two on-chip voltage references, TTL compatible digital interfaces, and low-power dissipation. The architecture of the chip allows asynchronous operation, a variable PCM data rate from 100 kbit/s to 4.096 Mbit/s, /spl mu//A law operation via pin selection, and gain selection at either of two levels in each direction.
Keywords
Codecs; Field effect integrated circuits; Large scale integration; Pulse-code modulation; Switched capacitor networks; Switched filters; codecs; field effect integrated circuits; large scale integration; pulse-code modulation; switched capacitor networks; switched filters; Capacitors; Codecs; Costs; Filters; Frequency; Phase change materials; Resistors; Sampling methods; Telephony; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1981.1051594
Filename
1051594
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