DocumentCode
891098
Title
An analog multiplier
Author
Beene, G.W.
Volume
55
Issue
7
fYear
1967
fDate
7/1/1967 12:00:00 AM
Firstpage
1206
Lastpage
1206
Abstract
A different approach to analog multiplication results in a four-quadrant multiplier using a field-effect transistor FET in a feedback network. The linear multiplication is obtained by operating the FET as a voltage-controlled conductance.
Keywords
Board of Directors; Circuits; Computer errors; Control systems; Equations; Error correction; FETs; Quantization; Voltage;
fLanguage
English
Journal_Title
Proceedings of the IEEE
Publisher
ieee
ISSN
0018-9219
Type
jour
DOI
10.1109/PROC.1967.5787
Filename
1447717
Link To Document