DocumentCode :
891130
Title :
A fault-tolerant 30 ns/375 mW 16Kx1 NMOS static RAM
Author :
Hardee, Kim C. ; Sud, Rahul
Volume :
16
Issue :
5
fYear :
1981
Firstpage :
435
Lastpage :
443
Abstract :
A fault-tolerant 30950 mil/SUP 2/ (19.9 mm/SUP 2/) 16K/spl times/1 static MOS RAM has been fabricated with a single polysilicon E/D NMOS process. Using circuit techniques normally restricted to dynamic RAMs, but adapted for asynchronous operation, the device achieves a typical access time of 30 ns while dissipating only 375 mW. Among the topics discussed in a new single-polysilicon memory cell configuration, the first truly asynchronous bootstrap circuit, an active bit-line equilibration and precharge scheme, and a new power-efficient substrate bias generator. Also described is an on-chip redundancy scheme which consumes approximately 2 percent of the total chip area, does not compromise access time and can be programmed using standard test equipment.
Keywords :
Field effect integrated circuits; Integrated memory circuits; Large scale integration; Random-access storage; field effect integrated circuits; integrated memory circuits; large scale integration; random-access storage; Circuits; Fault tolerance; MOS devices; Power generation; Random access memory; Read-write memory; Redundancy; Resistors; Transistors; Variable structure systems;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1981.1051619
Filename :
1051619
Link To Document :
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