• DocumentCode
    891563
  • Title

    Harmonic distortion in single-channel MOS integrated circuits

  • Author

    Tsividis, Yannis P. ; Fraser, Donald L.

  • Volume
    16
  • Issue
    6
  • fYear
    1981
  • fDate
    12/1/1981 12:00:00 AM
  • Firstpage
    694
  • Lastpage
    702
  • Abstract
    Expressions assuming a simple square-law MOSFET model are presented for the low-frequency harmonic distortion of an enhancement-mode source follower. These theoretical results are compared to measurements of several integrated versions of the three circuit types. For a given fabrication process, the main factors determining the amount of distortion for all three circuits are the quiescent output voltage and the output swing; to a first order, the distortion does not depend on bias current or device geometries. The distortion of an enhancement-mode source follower has a similar behavior to that of an enhancement-load inverter with the same output quiescent voltage and output swing; both distortions are nearly proportional to the body-effect coefficient. For the same output quiescent voltage and output swing, the distortion of the depletion-load inverter is the highest among the three circuits, but is practically independent of process parameters.
  • Keywords
    Electric distortion; Field effect integrated circuits; Large scale integration; electric distortion; field effect integrated circuits; large scale integration; Circuit noise; Distortion measurement; Geometry; Harmonic analysis; Harmonic distortion; Inverters; MOS devices; MOS integrated circuits; Solid state circuits; Voltage;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.1981.1051664
  • Filename
    1051664