DocumentCode
891573
Title
Programmed Algorithms to Compute Tests to Detect and Distinguish Between Failures in Logic Circuits
Author
Roth, J. Paul ; Bouricius, Willard G. ; Schneider, Peter R.
Author_Institution
IBM Corp., Thomas J. Watson Research Center, Yorktown Heights, N. Y.
Issue
5
fYear
1967
Firstpage
567
Lastpage
580
Abstract
Two algorithms are presented: one, DALG-II, computes a test to detect a failure in acyclic logic circuits; the other, TEST-DETECT, ascertains all failures detected by a given test. Both are based upon the utilization of a ``calculus of D-cubes´´ that provides the means for effectively performing the necessary computations for very large logic circuits. Strategies for combining the two algorithms into an efficient diagnostic test generation procedure are given. APL specifications of the algorithms are given in an Appendix.
Keywords
Calculus; Circuit testing; Coupling circuits; Fault location; Hardware; Logic circuits; Logic functions; Logic testing; Signal generators; System testing; Combinational logic; computer failure detection; diagnosis algorithms; diagnostic test generation; logic circuit diagnosis; programmed algorithms;
fLanguage
English
Journal_Title
Electronic Computers, IEEE Transactions on
Publisher
ieee
ISSN
0367-7508
Type
jour
DOI
10.1109/PGEC.1967.264743
Filename
4039146
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