DocumentCode
891862
Title
Analysis of harmonic distortion in single-channel MOS integrated circuits
Author
Fong, Edison ; Zeman, Richard
Volume
17
Issue
1
fYear
1982
Firstpage
83
Lastpage
86
Abstract
Presents a general analysis for the calculation of harmonic distortion in single-channel monolithic analog MOS integrated circuits. Power series expressions are obtained for basic stages often used in an analog MOS technology. These include the depletion load inverter, enhancement load inverter, depletion load source follower, enhancement load source follower, and the differential pair. From the power series expressions, the second-order harmonic distortion is calculated. These results are compared with data obtained from a test chip.
Keywords
Amplifiers; Electric distortion; Field effect integrated circuits; Invertors; Linear integrated circuits; Network analysis; amplifiers; electric distortion; field effect integrated circuits; invertors; linear integrated circuits; network analysis; Analog integrated circuits; Circuit testing; Equations; Harmonic analysis; Harmonic distortion; Integrated circuit technology; Inverters; MOS integrated circuits; Nonlinear distortion; Operational amplifiers;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1982.1051692
Filename
1051692
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