DocumentCode
892553
Title
The impact of testing on VLSI design methods
Author
Segers, M. T M Rene
Volume
17
Issue
3
fYear
1982
fDate
6/1/1982 12:00:00 AM
Firstpage
481
Lastpage
486
Abstract
The question `why design for testability´? is answered by discussing some existing test philosophies. Exhaustive testing, functional testing, and structural testing are treated, also with regard to their usefulness for VLSI circuits. There is no general agreement on how to design for testability. Various approaches exist, and each has its specific applications. Some of these approaches are discussed in detail, also regarding the influence of the complexity on necessary CAD tools for test pattern generation.
Keywords
Digital integrated circuits; Integrated circuit testing; Large scale integration; Monolithic integrated circuits; digital integrated circuits; integrated circuit testing; large scale integration; monolithic integrated circuits; Circuit testing; Design automation; Design for testability; Design methodology; Integrated circuit testing; Logic testing; Pins; Sequential analysis; Test pattern generators; Very large scale integration;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1982.1051763
Filename
1051763
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