DocumentCode :
893104
Title :
A Hi-CMOSII 8Kx8 bit static RAM
Author :
Minato, Osamu ; Masuhara, Toshiaki ; Sasaki, Toshio ; Sakai, Yoshio ; Hayashida, Tetsuya ; Nagasawa, Kouichi ; Nishimura, Kotaro ; Yasui, Tokumasa
Volume :
17
Issue :
5
fYear :
1982
Firstpage :
793
Lastpage :
798
Abstract :
A Hi-CMOSII static RAM with 8K word by 8 bit organization has been developed. The RAM is fabricated using double polysilicon technology and p- and n-channel transistors having a typical gate polysilicon length of 2 /spl mu/m. The device was realized using low-power high-speed-oriented circuit design and a new redundancy circuit that utilizes laser diffusion programmable devices. The new RAM has an address access time of 65 ns, operating power dissipation of 200 mW, and standby dissipation of 10 /spl mu/W.
Keywords :
Field effect integrated circuits; field effect integrated circuits; Alpha particles; CMOS memory circuits; CMOS technology; Circuit synthesis; MOS devices; Power dissipation; Random access memory; Read-write memory; Redundancy; Silicon;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1982.1051820
Filename :
1051820
Link To Document :
بازگشت