DocumentCode :
893193
Title :
A 40 ns CMOS E/SUP 2/PROM
Author :
Stewart, Roger G. ; Plus, Dora
Volume :
17
Issue :
5
fYear :
1982
Firstpage :
841
Lastpage :
846
Abstract :
New high-performance CMOS circuit techniques have been developed and used to build an 8K E/SUP 2/PROM with an access time of 38 ns at 5 V. Using standard CMOS/SOS technology, the device dissipates only 0.8 mW quiescent power at 5 V and 60 mW at 1 MHz. A midpoint precharge and sense technique permits operation form a supply voltage of 4-12 V.
Keywords :
Field effect integrated circuits; field effect integrated circuits; Decoding; Delay; Detectors; Logic circuits; Logic functions; PROM; Power dissipation; Power generation; Signal generators; Trigger circuits;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1982.1051828
Filename :
1051828
Link To Document :
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