DocumentCode :
893386
Title :
Performance analysis of signal vias using virtual islands with shorting vias in multilayer PCBs
Author :
Nam, Seungki ; Kim, Yonggyoo ; Kim, Yonghoon ; Jang, Hodeok ; Hur, Sub ; Song, Bongyong ; Lee, Jaehoon ; Jeong, Jichai
Author_Institution :
Dept. of Radio Eng., Korea Univ., Seoul, South Korea
Volume :
54
Issue :
4
fYear :
2006
fDate :
6/1/2006 12:00:00 AM
Firstpage :
1315
Lastpage :
1324
Abstract :
The mitigation method of parallel-plate waveguide (PPW) noises excited from signal vias due to the mode conversion of desired propagation modes into parasitic PPW modes in multilayer printed circuit boards (PCBs) has been proposed. The mitigation of PPW noises has been achieved using virtual islands with shorting vias. The shorting vias are used to provide the return current path with low impedances and the virtual islands are used to block the propagation of the PPW noises through PCBs. The transmission and coupling responses of signal vias applied to the virtual islands with shorting vias are calculated using the finite-difference time-domain method to show effectiveness of the proposed mitigation method of PPW noises. The PPW noises propagating through PPWs are dramatically suppressed and the electrical performances of signal vias in multilayer PCBs are improved using the proposed method. The effectiveness of the proposed mitigation method of PPW noises is also verified by measurements of S-parameters of signal vias in simple test boards applied to the virtual islands with shorting vias. The effects of geometrical parameters of the virtual islands on performances of signal vias are also investigated. The performances of signal vias applied to the virtual islands with shorting vias can be improved up to higher frequency by reducing the size of virtual islands. The effect of the gapwidth of slots can be neglected. The effective number of shorting vias of the proposed mitigation method is four. Since several signal vias can be located at a virtual island, the needed number of shorting vias to obtain good transmission and coupling responses using the proposed mitigation method is less than half of that to obtain similar performance using only shorting vias.
Keywords :
S-parameters; circuit noise; finite difference time-domain analysis; interconnections; parallel plate waveguides; printed circuit testing; printed circuits; S-parameters; coupling response; electrical performance; finite-difference time-domain method; gapwidth effect; geometrical parameters effect; mode conversion; multilayer printed circuit boards; noise mitigation; parallel-plate waveguide noise; performance analysis; return current path; shorting vias; signal vias; transmission response; virtual islands; Circuit noise; Couplings; Finite difference methods; Impedance; Noise measurement; Nonhomogeneous media; Performance analysis; Printed circuits; Scattering parameters; Time domain analysis; Finite difference time domain (FDTD); parallel-plate waveguide (PPW) noise; signal vias; virtual islands;
fLanguage :
English
Journal_Title :
Microwave Theory and Techniques, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9480
Type :
jour
DOI :
10.1109/TMTT.2006.871227
Filename :
1618547
Link To Document :
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