• DocumentCode
    893672
  • Title

    A four-quadrant NMOS analog multiplier

  • Author

    Soo, David C. ; Meyer, Robert G.

  • Volume
    17
  • Issue
    6
  • fYear
    1982
  • Firstpage
    1174
  • Lastpage
    1178
  • Abstract
    A four-quadrant NMOS analog multiplier, which achieves linearity better than 0.3 percent at 75 percent of full-scale swing, a bandwidth of DC to 1.5 MHz, and output noise 77 dB below full scale is described. Active area is 450 mils/SUP 2/.
  • Keywords
    Field effect integrated circuits; Linear integrated circuits; Multiplying circuits; field effect integrated circuits; linear integrated circuits; multiplying circuits; Bandwidth; Circuit noise; Dynamic range; Filters; MOS devices; Operational amplifiers; Signal processing; Transfer functions; Voltage;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.1982.1051877
  • Filename
    1051877
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=893672