DocumentCode
894002
Title
NMOS dense gate matrix VLSI design
Author
Schmidt, Kurt H. ; Mueller-Glaser, Klaus D.
Volume
18
Issue
2
fYear
1983
fDate
4/1/1983 12:00:00 AM
Firstpage
157
Lastpage
159
Abstract
New optimized rules for a fast dense gate matrix layout in single-metal polysilicon-gate depletion-load NMOS technology are presented and applied to a cell design suitable for a VLSI custom cell library.
Keywords
Circuit layout CAD; Field effect integrated circuits; Integrated logic circuits; Large scale integration; circuit layout CAD; field effect integrated circuits; integrated logic circuits; large scale integration; CMOS technology; Capacitance; Engineering drawings; Integrated circuit interconnections; Inverters; Libraries; MOS devices; Very large scale integration; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1983.1051916
Filename
1051916
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