DocumentCode
894428
Title
A new diagnostic test for operating margin problems in LSI memory
Author
Hamaguchi, Shigetatsu ; Ishikawa, Kohji
Volume
18
Issue
4
fYear
1983
Firstpage
409
Lastpage
413
Abstract
A new diagnostic test technique for operating margin problems in LSI memory has been developed that makes it possible to distinguish the failed circuit block exactly even if plural failed blocks exist. This method consists of two techniques using a newly developed time domain method (TDM). One is a technique that divides the multiple failure due to the plural failed circuit blocks into single failures. The other is a technique that distinguishes the single failure mode and then locates the failed circuit block. Moreover, a detailed diagnostic technique, combining bit mapping with the new diagnostic test technique, has also been developed. This technique enables distinguishing the failure mode more precisely. It is shown that 50 percent of the distinguished failure modes have 1-block resolution and 33 percent of them have 2-block resolution. For practical purposes, the failed circuit block can almost be distinguished with 1-block resolution by investigating the failure modes in connection with the physical layout.
Keywords
Failure analysis; Integrated circuit testing; Integrated memory circuits; Large scale integration; Monolithic integrated circuits; Random-access storage; failure analysis; integrated circuit testing; integrated memory circuits; large scale integration; monolithic integrated circuits; random-access storage; Circuit testing; Complexity theory; Large scale integration; Power supplies; Pulse circuits; Pulsed power supplies; Telephony; Time division multiplexing; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1983.1051964
Filename
1051964
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