Title :
A battery backup 64K CMOS RAM with double-level aluminum technology
Author :
Watanabe, Takayuki ; Hayasi, Mineo ; Sasaki, Isao ; Akatsuka, Yasuo ; Tsujide, Tohru ; Yamamoto, Hirohiko ; Kudoh, Osamu ; Takahashi, Sakari ; Hara, Toshio
Abstract :
A full CMOS 8K /spl times/ 8 bit RAM has been developed, incorporating a new circuit to transfer the memory automatically to the data-retention mode when supply voltage is lowered. For reducing operating power dissipation, internally synchronous circuits and a split power control technique were employed. A minimum cell size was obtained through the use of a double-level aluminum process.
Keywords :
Field effect integrated circuits; Integrated circuit technology; Integrated memory circuits; Large scale integration; Random-access storage; field effect integrated circuits; integrated circuit technology; integrated memory circuits; large scale integration; random-access storage; Aluminum; Batteries; CMOS process; CMOS technology; Circuits; Power control; Power dissipation; Random access memory; Read-write memory; Voltage control;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1983.1051983
