Title :
Programmable logic machine (A programmable cell array)
Author :
Skokan, Zdenek E.
fDate :
10/1/1983 12:00:00 AM
Abstract :
The PLM is a single mask, programmable cell array with complete interconnect. It is 100% wireable and 100% testable with built-in LSSD, it achieves subnanosecond cell delay and 400-gate complexity with less than 1 W of power, and it is fabricated through a low-density process resulting in low cost and a four-day turnaround. This paper describes why the PLM was developed, its operational characteristics, and how it differs from conventional gate arrays.
Keywords :
Bipolar integrated circuits; Cellular arrays; Integrated circuit technology; Integrated logic circuits; Large scale integration; bipolar integrated circuits; cellular arrays; integrated circuit technology; integrated logic circuits; large scale integration; Costs; Design automation; Documentation; Graphics; Logic arrays; Logic design; Programmable logic arrays; Programmable logic devices; Read only memory; Software testing;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1983.1051996
