Title :
A case for direct-mapped caches
Author_Institution :
Dept. of Comput. Sci., Wisconsin Univ., Madison, WI, USA
Abstract :
Direct-mapped caches are defined, and it is shown that trends toward larger cache sizes and faster hit times favor their use. The arguments are restricted initially to single-level caches in uniprocessors. They are then extended to two-level cache hierarchies. How and when these arguments for caches in uniprocessors apply to caches in multiprocessors are also discussed.<>
Keywords :
buffer storage; multiprocessing systems; performance evaluation; storage allocation; storage management; buffer storage; cache sizes; direct-mapped caches; hit times; multiprocessors; performance evaluation; single-level caches; storage allocation; storage management; two-level cache hierarchies; Capacitive sensors; Central Processing Unit; Computer aided instruction; Computer aided software engineering; Costs; Hardware; Read-write memory; Reduced instruction set computing; Sun;
