• DocumentCode
    894954
  • Title

    Low-Power-Design Space Exploration Considering Process Variation Using Robust Optimization

  • Author

    Srivastava, Ashish ; Kachru, Tejasvi ; Sylvester, Dennis

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI
  • Volume
    26
  • Issue
    1
  • fYear
    2007
  • Firstpage
    67
  • Lastpage
    79
  • Abstract
    Increasing levels of process variation in current process technologies make it extremely important that design and process decisions be made while considering their impact. This paper presents a convex-optimization-based approach to select values of supply voltages, threshold voltages, and oxide thicknesses to minimize power dissipation in a simplified abstraction of multi-Vdd/Vth/Tox CMOS designs while considering process variation. The authors use this probabilistic approach to perform optimization of different statistical parameters of power dissipation (e.g., mean or high percentile points) and quantify the impact of rising process variations on these power-minimization techniques
  • Keywords
    CMOS integrated circuits; circuit optimisation; low-power electronics; minimisation; probability; statistical analysis; CMOS designs; convex optimization; low power design space exploration; oxide thicknesses; power minimization; probabilistic approach; process variation; robust optimization; statistical parameters; supply voltages; threshold voltages; Circuits; Design optimization; Gate leakage; Minimization; Power dissipation; Process design; Robustness; Space exploration; Subthreshold current; Threshold voltage; Power minimization; robust optimization; variability; yield allocation;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2006.882491
  • Filename
    4039514