DocumentCode :
895133
Title :
Minimization of charge transfer errors in switched-capacitor stages
Author :
Klein, H.W. ; Engl, W.L.
Volume :
18
Issue :
6
fYear :
1983
fDate :
12/1/1983 12:00:00 AM
Firstpage :
764
Lastpage :
766
Abstract :
A method of minimization of charge transfer errors in switched-capacitor stages by optimizing the operating point of CMOS amplifiers is presented. This results in fewer errors, higher power efficiency, and increased driver capability; both one- and two-stage amplifiers can be optimized. Additional error reductions due to dynamic biasing are investigated. The method presented reduces design time if standard cells are used.
Keywords :
Differential amplifiers; Errors; Field effect integrated circuits; Linear integrated circuits; Minimisation; Operational amplifiers; Switched capacitor networks; differential amplifiers; errors; field effect integrated circuits; linear integrated circuits; minimisation; operational amplifiers; switched capacitor networks; Charge transfer; Driver circuits; Error correction; Filters; High power amplifiers; Minimization methods; Operational amplifiers; Optimization methods; Transconductance; Voltage;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1983.1052029
Filename :
1052029
Link To Document :
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