A new internal overvoltage protection structure for the bipolar power transistor

A new integrated structure for internal overvoltage protection of a bipolar power transistor is presented which consists of the simultaneous integration of an interdigitated n-p-n (p-n-p) bipolar power transistor and a merged n-(p) channel-enhancement MOSFET. The magnitude of the overvoltage protection for the bipolar transistor is determined by the threshold voltage of the merged MOSFET, which can be controlled by the thickness of the gate oxide and the substrate doping of the merged MOSFET. A simple analytical model for the overvoltage protection has been developed. The fabrication techniques and design considerations of this integrated structure are discussed, and the applicability of the proposed structure is demonstrated experimentally.