High-voltage analog performance with low-voltage digital devices [100 V dense operational amplifier fabrication]

A new circuit technique is described, yielding typical analog system voltage (36 V) operation from a circuit fabricated with low-voltage (LV/SUB CEO/=12-15 V) transistors. Such transistors can be fabricated in one-quarter the area of conventional higher breakdown devices, leading to great reductions in chip size and improved frequency performance due to decreased parasitics. This technique can be used to build complex systems combining high-voltage analog and dense digital circuitry on the same chip, with standard digital processing and without sacrificing analog performance. An extension of the technique uses a typical linear (LV/SUB CEO/=40 V) process to build high voltage (80-100 V) circuits. A 100 V op amp was designed and breadboarded with standard linear kit parts.