DocumentCode
895306
Title
High-performance NMOS operational amplifier
Author
Senderowicz, Daniel ; Hodges, David A. ; Gray, Paul R.
Volume
13
Issue
6
fYear
1978
Firstpage
760
Lastpage
766
Abstract
A high performance operational amplifier 300 mil/SUP 2/ in area has been designed and fabricated in a standard n-channel silicon-gate enhancement/depletion MOS process. Specifications achieved include open-loop gain, 1000; power consumption, 10 mW; common-mode range within 1.5 V of either supply rail; unity-gain bandwidth, 3.0 MHz with 80/spl deg/ phase margin; RMS input noise (2.5 Hz-46 kHz), 25 /spl mu/V; C-message weighted noise -5 dBrnC; and 0.1-percent settling time, 2.5 /spl mu/s.
Keywords
Field effect integrated circuits; Linear integrated circuits; Operational amplifiers; field effect integrated circuits; linear integrated circuits; operational amplifiers; Bandwidth; Circuits; Energy consumption; Filters; MOS devices; Noise level; Operational amplifiers; Oxidation; Phase noise; Silicon;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1978.1052047
Filename
1052047
Link To Document