Bond Pad Design With Low Capacitance in CMOS Technology for RF Applications

Author

Hsiao, Yuan-Wen ; Ker, Ming-Dou

Author_Institution

Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu

Volume

28

Issue

1

fYear

2007

Firstpage

68

Lastpage

70

Abstract

A new bond pad structure in CMOS technology with low capacitance for gigahertz radio frequency applications is proposed. Three kinds of inductors stacked under the pad are used in the proposed bond pad structure. Experimental results have verified that the bond pad capacitance is reduced due to the cancellation effect provided by the inductor embedded in the proposed bond pad structure. The new proposed bond pad structure is fully process-compatible to general CMOS processes without any extra process modification

Keywords

CMOS integrated circuits; inductors; radiofrequency integrated circuits; CMOS technology; RF applications; RFIC; bond pad design; gigahertz radio frequency applications; low capacitance; radio frequency integrated circuit; Bonding; CMOS process; CMOS technology; Electrostatic discharge; Inductors; Parasitic capacitance; Protection; Radio frequency; Radiofrequency integrated circuits; Silicon; Bond pad; capacitance; loss; radio frequency integrated circuit (RF IC);

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2006.887631

Filename

4039551