DocumentCode :
895433
Title :
A precision FET-less sample-and-hold with high charge-to-droop current ratio
Author :
Erdi, George ; Henneuse, Paul R.
Volume :
13
Issue :
6
fYear :
1978
Firstpage :
864
Lastpage :
873
Abstract :
A monolithic sample-and-hold amplifier designed without field-effect transistors is described. Various sample-and-hold configurations are compared and their merits are discussed. Unique features of the design include a diode-bridge switch and a current booster with 50 mA of drive capability to charge the hold capacitor during large signal acquisition. The output amplifier´s operating conditions are changed under logic control; it functions as a fast follower in the sample mode, and as a low input current amplifier in the hold mode. Performance characteristics include: 3.5-/spl mu/s acquisition time to 0.1 percent with a 5000-pF hold capacitor, 50 pA of droop current from 0 to 70/spl deg/C, 10/SUP 9/ charge-to-droop current ratio, and 0.3 mV of zero-scale error.
Keywords :
Linear integrated circuits; Sample and hold circuits; linear integrated circuits; sample and hold circuits; Capacitance; Capacitors; Circuits; Diodes; FETs; Feedback loop; Signal design; Switches; Temperature; Voltage;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1978.1052061
Filename :
1052061
Link To Document :
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