A 40 ns 64 kbit junction-shorting PROM

The memory is organized as 8192 words/spl times/8 bits. A memory cell consists of a programmable element composed of a p-n junction diode and a vertically connected p-n-p transistor. During programming, the programmable element is changed from the current-blocking state of a reverse diode to the current-conducting state of a shorted junction diode by using the diffused eutectic aluminum process (DEAP). With a selective power switching dual-stage decoder, the power dissipation in the decoder circuit was reduced to 40% of a conventional decoder without power switching. The power saved was used to speed up the multiplexers and the output buffers.