Title :
Multibit correcting data interface for fault-tolerant systems
Author :
Redinbo, G. Robert ; Napolitano, Leonard M. ; Andaleon, David D.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Davis, CA, USA
fDate :
4/1/1993 12:00:00 AM
Abstract :
A fault-detecting, bidirectional data interface between uncoded data from one component, such as a processor, and coded data in the rest of the system is described. This interface is capable of correcting a single multibit symbol error or detecting the occurrence of two such errors. The device uses a shortened Reed-Solomon code, and two practical symbol sizes are considered; nibble (4-bit) errors are protected by a (40, 32) binary equivalent shortened code, and byte errors are covered by a (80, 64) binary-sized code. The Reed-Solomon codes have maximum protection levels, even when shortened, and allow simplifying the design options. A dual orthogonal basis used for the symbols´ representations provides significant hardware savings. The interface unit achieves internal fault detection by comparing regenerated parity values in a totally self-checking equality checker. A fault-tolerant ultrareliable memory module is proposed and evaluated. An illustrative design is realized using a single desktop programmable gate array
Keywords :
Reed-Solomon codes; error correction codes; fault tolerant computing; logic arrays; binary-sized code; byte errors; dual orthogonal basis; fault-tolerant systems; multibit correcting data interface; nibble errors; processor; shortened Reed-Solomon code; single desktop programmable gate array; totally self-checking equality checker; ultrareliable memory module; uncoded data; Circuit faults; Decoding; Digital signal processing; Error correction; Fault detection; Fault tolerant systems; Hardware; Process design; Protection; Reed-Solomon codes;
Journal_Title :
Computers, IEEE Transactions on