Title :
A real-time video signal processing chip
Author :
Chen, Liang-Gee ; Liu, Yuan-Chen ; Tzi-Dar Chiuch ; Lee, Yung-Pin
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fDate :
5/1/1993 12:00:00 AM
Abstract :
A real-time video signal processing chip for video data compression which combines block truncation coding (BTC) and a conventional motion compensation (MC) algorithm is presented. The regularity and simplicity of the BTC algorithm strongly suggest that it is quite suitable for an efficient VLSI implementation. It is shown that the proposed BTC-based system is much better than the conventional system in terms of implementation, complexity, and accuracy. Two benchmark sequences are used as test examples. The clock rate of the designed chip is about 47 MHz, which is suitable for most video applications
Keywords :
CMOS integrated circuits; VLSI; application specific integrated circuits; block codes; codecs; data compression; digital signal processing chips; image processing equipment; motion estimation; real-time systems; video equipment; 47 MHz; BTC algorithm; CMOS; EHF; IC; VLSI implementation; accuracy; benchmark sequences; block truncation coding; clock rate; codec; complexity; image processing; integrated circuits; motion compensation; real-time video signal processing chip; video data compression; Buffer storage; Data compression; Discrete cosine transforms; Image reconstruction; Signal processing algorithms; Very large scale integration; Video codecs; Video coding; Video compression; Video signal processing;
Journal_Title :
Consumer Electronics, IEEE Transactions on
