Equivalent circuit modeling of interconnects from time-domain measurements

Author

Jong, Jyh-Ming ; Janko, Bozidar ; Tripathi, Vijai

Author_Institution

Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA

Volume

16

Issue

1

fYear

1993

fDate

2/1/1993 12:00:00 AM

Firstpage

119

Lastpage

126

Abstract

A technique for the equivalent circuit modeling of single and coupled uniform and nonuniform interconnects, including discontinuities such as bends and junctions in high-speed circuits and packages, is presented. The circuit models are extracted from time-domain reflection and transmission measurement (TDR/T). The SPICE simulated results for the extracted circuit models for typical single and coupled structures are compared with the measured data to validate the accuracy of the circuit models

Keywords

equivalent circuits; modelling; packaging; SPICE simulated results; bends; coupled structures; discontinuities; equivalent circuit modeling; extracted circuit models; high-speed circuits; interconnects; junctions; packages; reflection measurement; time-domain measurements; transmission measurement; Circuit simulation; Coupling circuits; Data mining; Equivalent circuits; Impedance; Integrated circuit interconnections; Packaging; Reflection; Time domain analysis; Transmission line matrix methods;

fLanguage

English

Journal_Title

Components, Hybrids, and Manufacturing Technology, IEEE Transactions on

Publisher

ieee

ISSN

0148-6411

Type

jour

DOI

10.1109/33.214868

Filename

214868